DIGITAL FILTER

PURPOSE:To eliminate the need for an internal oscillator and switches for lots of circuits by utilizing a transmission clock of input data as it is to control each shift operation or the like. CONSTITUTION:Serial input data A1-A4 and B1-B4 are shared by a distributor 1 and subjected to arithmetic processing by digital filter arithmetic sections 2, 3 according to a serial transmission clock. The least bits A1, B1 are inputted respectively to shift registers 21, 22 at first. Then bits A2A1 and B2B1 are transferred as shown in a figure (b) next. When the least bit is detected at a point X, switches 26, 27 are thrown respectively to the positions 1, 3. When both digital filter operating sections give outputs up to the 3rd bits, they are stored as shown in a figure (c). When up to the 4th bits are outputted succeedingly, all bits of the 1st digital filter arithmetic section 2 are occupied to all bits of the 1st and 2nd serial/parallel converters 24, 25 as shown in Fig. (d) and fetched to a latch circuit 8. The 4-bit latch circuit 8 is replaced to A4-A1 and B4-B1 at each two- bit time succeedingly alternately and parallel output is attained.