SEMICONDUCTOR DEVICE

PURPOSE:To realize a lower breakdown voltage and improved surge-withstanding capability by a method wherein a p-n junction with a low breakdown voltage is parallelly connected to a p-n junction with a high breakdown voltage positioned between an epitaxially grown layer and isolating region. CONSTITU...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: HAYANO TETSUKAZU, HIRAKI KOUJI, KITAMURA MASAYOSHI
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:PURPOSE:To realize a lower breakdown voltage and improved surge-withstanding capability by a method wherein a p-n junction with a low breakdown voltage is parallelly connected to a p-n junction with a high breakdown voltage positioned between an epitaxially grown layer and isolating region. CONSTITUTION:A buried region 10 of high n type density is positioned, partially in contact with an isolating region 3, along the interface between a base layer 2, which is an epitaxially grown region of low n type densty positioned below a base take-out region 5 of high n type density, and a substrate 1 of high p type density. With the region 10 being of high density, the p-n junction between the region 10 and the isolating region 3 has a lower breakdown voltage, which results in the lowering of the breakdown voltage across the base layer 2 and isolating region 3 and in an augmented surge withstanding capability.