MULTIMODE TESTING CIRCUIT

PURPOSE:To generate many test modes with two test terminals by inputting an (n)-bit serial signal to a shift register circuit which performs shifting operation with a pulse signal having a different specific period. CONSTITUTION:When a high-level signal with a period T is supplied to a test terminal 1, an NOR gate 4 detects its leading edge to set an RS type FF6, and an AND gate 7 sends out a signal 8phi. Then when the leading edge of the signal 8phi is detected by a D type FF8 and an NOR gate 9 and the trailing edges of the specific high-level signal and reference signal 8phi coincide with each other, an RS type FF11 is set. Consequently, the (n)-bit serial signal is outputted from an AND gate 12 and set in the shift register with a clock signal from a test terminal 17, so outputs of Q1-Q4 are decoded to obtain 15 kinds of test mode.