SEMICONDUCTOR MEMORY

PURPOSE:To suppress the power supply current and chip size to a required minimum value by using a data input terminal of a couple of drive circuit driving a couple of data lines in common, allowing a couple of drive circuit to input a couple of data information pieces complementary to a couple of da...

Ausführliche Beschreibung

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Bibliographische Detailangaben
1. Verfasser: SAWANO TAKUYA
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:PURPOSE:To suppress the power supply current and chip size to a required minimum value by using a data input terminal of a couple of drive circuit driving a couple of data lines in common, allowing a couple of drive circuit to input a couple of data information pieces complementary to a couple of data lines so as to write data to the memory array. CONSTITUTION:A couple of data lines 1, 2 and an address line 4 are connected to the memory array 3 so as to be crossed together. Data are read and written by the data lines 1, 2 to the memory array 3 selected by the address line 4. The write/read is controlled by a write/read control line 5 in cross connection with the data lines 1, 2. In case of write, the data lines 1, 2 input complementary data information with opposite logical state. Inverse drive circuit 6, 8, 9 drive the datalines 1, 2 so as to input the data information like this. The inverse drive circuit 8 can be a simple inverter having a small drive capability.