TRACKING OF PROGRAM

The method provides a separate trace table (TT) for each CPU in an MP (multiprocessor) to avoid inter-CPU interference in making trace table entries (16) for explicit and implicit tracing instructions enabled by flag bits (E, A, B) in a control register (CR). Explicit tracing entries are made for an...

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Bibliographische Detailangaben
Hauptverfasser:	PIITAA HAAMAN GAMU, AASAA RUISU REBUIN, RONARUDO MOOTON SUMISU, JIYON HEIDON UIRUSON
Format:	Patent
Sprache:	eng
Schlagworte:	CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS
Online-Zugang:	Volltext bestellen
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Beschreibung
Zusammenfassung:	The method provides a separate trace table (TT) for each CPU in an MP (multiprocessor) to avoid inter-CPU interference in making trace table entries (16) for explicit and implicit tracing instructions enabled by flag bits (E, A, B) in a control register (CR). Explicit tracing entries are made for an enabled explicit tracing (TR) instruction (11). Implicit tracing entries are made for predetermined instructions (when enabled for tracing) which do not have tracing as their primary purpose. A storage operand (12) of the trace instruction (11) contains a disablement field (T) and optionally may contain an enablement-controlling class field (4...7) to improve the integrity of traceable programs. A time stamp and a range of general register (R1...R3) contents is provided in each trace table entry for a tracing instruction. The time stamp enables all trace tables in an MP system to be later merged into a single trace table whenever required.