BUFFER MEMORY

PURPOSE:To increase the access speed by performing an address array reading operation at a high speed for a buffer memory of a set associative system. CONSTITUTION:A data memory part 202 is connected to a latest access row address array 200 which stores the addresses in a main memory of data on the...

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Bibliographische Detailangaben
Hauptverfasser: TORII SHIYUNICHI, SHIYOUNAI TOORU, SHINTANI YOUICHI
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:PURPOSE:To increase the access speed by performing an address array reading operation at a high speed for a buffer memory of a set associative system. CONSTITUTION:A data memory part 202 is connected to a latest access row address array 200 which stores the addresses in a main memory of data on the latest access row for each column as well as the addresses in the part 202. A buffer memory of such constitution starts an access with use of the array 200 in parallel to the access carried out by a conventional device for the memory reference given from a central processor. If the memory reference is equal to the reference to the row that receives the latest access, the data is obtained at a high speed from the access using the array 200. Thus the data memory part is read directly from the array 200 to obtain data with most of the reference. This decreases the read-out time by an amount equal to the difference of the capacity between the array 200 and an address array.