SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE

PURPOSE:To achieve a higher testing efficiency without increasing external terminals by incorporating a test circuit which receives a serial data to feed a test pattern signal directly to an internal logic circuit from a specified input terminal and/or to form a test mode signal for sending out a si...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: KITAGAWA NOBUO, NAGASE KENICHI, TACHIKI TAKUO
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:PURPOSE:To achieve a higher testing efficiency without increasing external terminals by incorporating a test circuit which receives a serial data to feed a test pattern signal directly to an internal logic circuit from a specified input terminal and/or to form a test mode signal for sending out a signal of the internal logic circuit to a specified output terminal. CONSTITUTION:A test circuit TST is provided which supplies a testing serial data higher in the normal signal level to an external terminal of an input specialized port I and receives this serial data to feed a test pattern from a specified external terminal directly to an internal circuit forming a specified test mode signal and/or sent out a signal of the internal circuit directly to the external terminal. When a serial data high in the level is fed utilizing an external terminal providing for the input specialized port, a level detection circuit LV responding to a high level signal is provided and the serial data is held in a shift register SR. A data taken into the shift register SR is transmitted to a decoder DCR in parallel.