MIXER CIRCUIT

PURPOSE:To obtain a mixer circuit having an adder circuit free from mutual interference between a local oscillation signal and a high frequency signal and free from loss by taking out an IF signal from the drain of an FET for mixer. CONSTITUTION:The emitter of a BJT 16 is grounded by using two bipol...

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Bibliographische Detailangaben
Hauptverfasser: TANABE KENZOU, NAKAMURA MASAHIKO
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:PURPOSE:To obtain a mixer circuit having an adder circuit free from mutual interference between a local oscillation signal and a high frequency signal and free from loss by taking out an IF signal from the drain of an FET for mixer. CONSTITUTION:The emitter of a BJT 16 is grounded by using two bipolar transistors BJT 16, 17 having the same characteristics, and at the same time, its collector is connected to the emitter of a BJT 17, and the collector of the BJT 17 is connected to a power source Vcc. That is, a so-called cascade connecting system is adopted. By this way, the collector current of BJT 16, 17 is made equal and DC bias voltage that applies collector current to the bases B of BJTs 16, 17 is given. At the same time, a high frequency signal is added to a base B and a local oscillation signal is added to another base B, and a signal made by addition of the two signals is obtained from a connecting point of collector and emitter of the BJT. By adding this signal between the gate and source of a J-FET 10 used as a mixer, an IF signal is obtained from the drain side.