LOGIC CIRCUIT TESTER

PURPOSE:To compare or prohibit the high impedance state of a 3-state output signal according to a pattern following a copying by prohibiting a comparative decision of an output voltage level at a comparative decision section on the condition that information on the high impedance state is memorized in a memory means. CONSTITUTION:'1' is written into a corresponding bit at a high impedance memory 7 with an R/W control circuit 8 when the output voltage of a circuit 1 to be tested is at an intermediate level indicating a high impedace state in the right mode. The contents of the memory 7 are fed to one input terminal of an AND gate 16 inverted through an AND gate 18 at the test. A comparator enable information stored in a CPE file 5 is fed to the other input terminal of the AND gate 16 and an output of the AND gate 16 is fed to a comparative decision circuit 4 as signal to control the comparator enable thereof 4. Therefore, at the test, when the high impedance state is memorized into the memory 7, that is, '1' is memorized, the AND gate 16 is cut off.