REFERENCE LEVEL SETTING SYSTEM OF COMPARATOR CIRCUIT

PURPOSE:To attain easily and accurately the setting of a reference level by storing plural reference level data to a storage means and reading selectively one of the stored reference level data. CONSTITUTION:When type of bank note is designated at a bank note processing machine for example, a CPU11...

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1. Verfasser: KAN TOMIO
Format: Patent
Sprache:eng
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Zusammenfassung:PURPOSE:To attain easily and accurately the setting of a reference level by storing plural reference level data to a storage means and reading selectively one of the stored reference level data. CONSTITUTION:When type of bank note is designated at a bank note processing machine for example, a CPU11 recognizes it and an address of a nonvolatile memory 12 in which a reference level data corresponding to the recognized type of bank note is written is outputted to an address bus 15 so as to designate the address of the memory 12. Further, the CPU11 outputs a chip enable signal obtained by decoding this address to a control line 16 and reads the reference level data in the memory 12 to a data bus 14. Then, it is latched to a D/A converter 13 in synchronizing with a write signal, its output voltage is inputted to a comparator circuit 4 via a resistor 3, and an analog signal is binary-coded by using this voltage as a reference level.