MANUFACTURE OF SEMICONDUCTOR DEVICE

PURPOSE:To realize an MNOS gate structure having electrically stabilized characteristics by a method wherein no hysteresis is generated in the C-VG characteristics by performing an annealing treatment two times. CONSTITUTION:A gate oxide film 22 and a silicon nitriding film 23 are formed on a silico...

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Bibliographische Detailangaben
Hauptverfasser: KURIHARA HIROYUKI, KIYOZUMI FUMIO, ABE HIDEJI
Format: Patent
Sprache:eng
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Zusammenfassung:PURPOSE:To realize an MNOS gate structure having electrically stabilized characteristics by a method wherein no hysteresis is generated in the C-VG characteristics by performing an annealing treatment two times. CONSTITUTION:A gate oxide film 22 and a silicon nitriding film 23 are formed on a silicon semiconductor substrate 21 and an annealing treatment is performed in the atmosphere of dry nitrogen or oxygen. A polycrystalline silicon film 24 is formed and the silicon film 24 is patterned in a form to become a gate along with the silicon nitriding film 23 and the gate oxide film 22 and is performed an annealing treatment in the atmosphere of dry oxygen and, following that, in the atmosphere of dry nitrogen.