LOGICAL CIRCUIT

PURPOSE:To eliminate an unnecessary pulse or to decrease the pulse width by applying a signal in in-phase, opposite phase and opposite phase to an input signal to a gate of the 1st, 2nd and 3rd trasistors (TRs) respectively and applying a signal in opposite phase to the signal applied to the 2nd TR to the gate of the 4th TR. CONSTITUTION:Since both TRs 41, 42 are cut off at the period when the input signal is at low level, the low level of the input signal is not transmitted and a signal appearing at the 1st connecting point is always at high level. When a pulse transiting from low to high level is inputted to the input terminal, since the TR42 is conductive when the input signal is at high level, a pulse equal to the input signal appears at the 1st connecting point, and a TR44 is cut off by an inverter 47 and the TR43 is cut off by an inverter 46 respectively when the signal appearing at the 1st connecting point is at high level, and they are conductive during a period equal to the high level period after the level is transited from high to low level.