PROGRAMMABLE FREQUENCY GENERATOR
PURPOSE:To improve the degree of freedom of a frequency dividing ratio, by using a divided frequency by means of a microcomputer for a comparatively low frequency, in generating an optional frequency at a programmable frequency generator. CONSTITUTION:A frequency fosc generated from a reference freq...
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| creator | TADAMATSU HIDEKAZU DEGUCHI TAKASHI KAMIYAMA KAZUMI |
| description | PURPOSE:To improve the degree of freedom of a frequency dividing ratio, by using a divided frequency by means of a microcomputer for a comparatively low frequency, in generating an optional frequency at a programmable frequency generator. CONSTITUTION:A frequency fosc generated from a reference frequency oscillator 1 is inputted to a CLK terminal of a programmable counter 2, and an address code is inputted from outputs O0-O7 of the microcomputer 3 to address inputs P0-P7 to determine the frequency dividing ratio. A direct output of the counter 2 is f1 and an output of a binary counter 4 incorporated in the counter 2 is f2 and it is inputted to an interruption input I0. An output frequency-dividing the output f2 with the software of the computer 3 is f3 and the final frequency output fOUT is outputted selectively via a selecting output circuit 5 designated at output terminals O01-O03 of the computer 3 with the frequency range. |
| format | Patent |
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CONSTITUTION:A frequency fosc generated from a reference frequency oscillator 1 is inputted to a CLK terminal of a programmable counter 2, and an address code is inputted from outputs O0-O7 of the microcomputer 3 to address inputs P0-P7 to determine the frequency dividing ratio. A direct output of the counter 2 is f1 and an output of a binary counter 4 incorporated in the counter 2 is f2 and it is inputted to an interruption input I0. An output frequency-dividing the output f2 with the software of the computer 3 is f3 and the final frequency output fOUT is outputted selectively via a selecting output circuit 5 designated at output terminals O01-O03 of the computer 3 with the frequency range.</description><language>eng</language><subject>APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC,OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWERSUPPLY SYSTEMS ; BASIC ELECTRONIC CIRCUITRY ; CONTROL OR REGULATING SYSTEMS IN GENERAL ; CONTROL OR REGULATION THEREOF ; CONTROLLING ; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUTPOWER ; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER ; ELECTRICITY ; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS ; GENERATION ; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS ORELEMENTS ; PHYSICS ; PULSE TECHNIQUE ; REGULATING</subject><creationdate>1984</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=19840127&DB=EPODOC&CC=JP&NR=S5916427A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25563,76318</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=19840127&DB=EPODOC&CC=JP&NR=S5916427A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>TADAMATSU HIDEKAZU</creatorcontrib><creatorcontrib>DEGUCHI TAKASHI</creatorcontrib><creatorcontrib>KAMIYAMA KAZUMI</creatorcontrib><title>PROGRAMMABLE FREQUENCY GENERATOR</title><description>PURPOSE:To improve the degree of freedom of a frequency dividing ratio, by using a divided frequency by means of a microcomputer for a comparatively low frequency, in generating an optional frequency at a programmable frequency generator. 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CONSTITUTION:A frequency fosc generated from a reference frequency oscillator 1 is inputted to a CLK terminal of a programmable counter 2, and an address code is inputted from outputs O0-O7 of the microcomputer 3 to address inputs P0-P7 to determine the frequency dividing ratio. A direct output of the counter 2 is f1 and an output of a binary counter 4 incorporated in the counter 2 is f2 and it is inputted to an interruption input I0. An output frequency-dividing the output f2 with the software of the computer 3 is f3 and the final frequency output fOUT is outputted selectively via a selecting output circuit 5 designated at output terminals O01-O03 of the computer 3 with the frequency range.</abstract><oa>free_for_read</oa></addata></record> |
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| subjects | APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC,OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWERSUPPLY SYSTEMS BASIC ELECTRONIC CIRCUITRY CONTROL OR REGULATING SYSTEMS IN GENERAL CONTROL OR REGULATION THEREOF CONTROLLING CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUTPOWER CONVERSION OR DISTRIBUTION OF ELECTRIC POWER ELECTRICITY FUNCTIONAL ELEMENTS OF SUCH SYSTEMS GENERATION MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS ORELEMENTS PHYSICS PULSE TECHNIQUE REGULATING |
| title | PROGRAMMABLE FREQUENCY GENERATOR |
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