PROGRAMMABLE FREQUENCY GENERATOR

PURPOSE:To improve the degree of freedom of a frequency dividing ratio, by using a divided frequency by means of a microcomputer for a comparatively low frequency, in generating an optional frequency at a programmable frequency generator. CONSTITUTION:A frequency fosc generated from a reference freq...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: TADAMATSU HIDEKAZU, DEGUCHI TAKASHI, KAMIYAMA KAZUMI
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:PURPOSE:To improve the degree of freedom of a frequency dividing ratio, by using a divided frequency by means of a microcomputer for a comparatively low frequency, in generating an optional frequency at a programmable frequency generator. CONSTITUTION:A frequency fosc generated from a reference frequency oscillator 1 is inputted to a CLK terminal of a programmable counter 2, and an address code is inputted from outputs O0-O7 of the microcomputer 3 to address inputs P0-P7 to determine the frequency dividing ratio. A direct output of the counter 2 is f1 and an output of a binary counter 4 incorporated in the counter 2 is f2 and it is inputted to an interruption input I0. An output frequency-dividing the output f2 with the software of the computer 3 is f3 and the final frequency output fOUT is outputted selectively via a selecting output circuit 5 designated at output terminals O01-O03 of the computer 3 with the frequency range.