PARALLEL PROCESSING SYSTEM

PURPOSE:To allow a number of processors to perform processing in parallel through simple constitution by detecting a processing result satisfy a specified requirement and causing a branch to another processing routine during SIMD operation wherein a single instruction stream handles number of data s...

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Bibliographische Detailangaben
Hauptverfasser: MORIYA EIJI, ITOU YUKINOBU
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:PURPOSE:To allow a number of processors to perform processing in parallel through simple constitution by detecting a processing result satisfy a specified requirement and causing a branch to another processing routine during SIMD operation wherein a single instruction stream handles number of data streams simultaneously. CONSTITUTION:A controller 2 is connected to plural processors 1A through a common bus 3 and the controller 2 is provided with a control memory 4 for SIDM stores the instruction stream of the SIMD operation for processing different data streams by the same instruction stream simultaneously in principle. Further, each processor 1A is provided with a control memory 5A for MIMD stores the instruction stream of MIMD operation for processing different data streams by independent instruction streams. Furthermore, each processor 1A is provided with a pipeline 6A, processor 7A, FF8A, and AND gate 9A. When the processing result of the SIDM operation satisfy specific requirements, a branch to another processing routine is caused to allow the parallel processing of the processors.