RECEIVING DEVICE

PURPOSE:To prevent a noise from being mixed into an AGC voltage when a PLL circuit is asynchronous, by providing a capacitor for holding the AGC voltage and a switch which opens the AGC circuit of an intermediate frequency amplifier when the PLL circuit is asynchronous. CONSTITUTION:When a phase locked loop (PLL) circuit is in the asynchronous state, a switch 17 is turned on. The output of a detector 6 has relatively higher frequency components eliminated by a capacitor 18 and is supplied as an AGC voltage or a meter voltage to the AGC terminal of an intermediate frequency amplifier 5 or a signal circuit 10. When the PLL circuit becomes asynchronous state, the switch 17 is turned off, and the noise output from the intermediate frequency amplifier 5 is cut, and simultaneously, the just preceding AGC voltage is held in the capacitor 18. Thus, noise components, which are mixed into the AGC voltage when the PLL circuit is in the asynchronous state, are eliminated completely.