TIMING CIRCUIT

PURPOSE:To make possible a high resolution timing with a simple structure, by a method wherein clock pulses are time-voltage converted to improve timing resolution. CONSTITUTION:A gate output from an RS type FF3 controlled by transmitting and receiving pulses, and an output from an oscillator 1 thro...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: HIRAMATSU TADAO, KATAYAMA MOTOO
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:PURPOSE:To make possible a high resolution timing with a simple structure, by a method wherein clock pulses are time-voltage converted to improve timing resolution. CONSTITUTION:A gate output from an RS type FF3 controlled by transmitting and receiving pulses, and an output from an oscillator 1 through an RS type FF2 are frequency divided and applied to a counter 7 through AND gates 4 and 5, and an RS type FF6. The counter 7 counts clocks during gating period. On the other hand, the fractions of the clocks are converted to the voltage by an integrator 11 or 12 controlled by the FF6 etc. A microcomputer 14 culculates the time corresponding to the distance between the transmitting and receiving pulses etc. by summing the counting value of the counter 7 and the output of the integrator 11 or 12 selected according to an output applied from a timer 8 which is controlled through a FF3. According to the present structure, the high resolution timing is possible by the simple structure, as it is not utilize high frequency clocks.