SEMICONDUCTOR NON-VOLATILE MEMORY CELL

PURPOSE:To obtain both functions of an ROM and a non-volatile RAM erasable electrically and to improve the conventionality, by combining a CMOS memory cell and an N channel MNOS transistor (TR). CONSTITUTION:An anode of a diode D is connected to a drain of a TR T1 of a CMOS memory consisting of elec...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
1. Verfasser: TOKUSHIGE KAORU
Format: Patent
Sprache:eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
Beschreibung
Zusammenfassung:PURPOSE:To obtain both functions of an ROM and a non-volatile RAM erasable electrically and to improve the conventionality, by combining a CMOS memory cell and an N channel MNOS transistor (TR). CONSTITUTION:An anode of a diode D is connected to a drain of a TR T1 of a CMOS memory consisting of electric field effect TRs T1-T6. A drain-source path of an N channel electric field effect TR MT is connected between the cathode of the diode D and the drain of the TR T3, and the gate is connected to a gate signal line MG. The field effect TR MT of the MNOS (metallic nitride semiconductor) takes two states of depletion or enhancement mode by applying a pulse voltage with different polarity between the gate channels.