CURRENT LIMITING CIRCUIT

PURPOSE:To suppress the maximum value of a charging current low by connecting a transistor (TR) circuit, connecting with a bias circuit including a CR parallel connection between the base and emitter, in parallel to at least one FET circuit having the source and gate short-circuited. CONSTITUTION:The current limiting circuit 5 consists of a field effect transistor (FET) circuit 5a interposed in series in the current supply path from a voltage source 1 to a load 2, and a TR circuit 5b connected in parallel to the FET circuit 5a. The n type FET51 constituting the FET circuit 5a, while having the source S and gate G short-circuited, is connected at the source S to the side of the load 2, and also connected at the drain D to the side of the voltage source 1. In the TR circuit 5b, the bias circuit consisting of a capacitor 53 and a resistance 54 connected in parallel is connected between the emitter E and base B of a PNP-type TR52, which is connected to the voltage source 1 at the emitter E, to the load 2 at the collector C, and to an earth line at the base B through a resistance 55.