COMPILING SYSTEM FOR CONDITIONAL STATEMENT FOR VECTOR PROCESSOR

PURPOSE:To automatically produce an objective program including vector instructions efficiently for multiplex loop operations, by separating a condition equation section of a program statement from an operation section to be controlled and generating a specific instruction to each of them. CONSTITUTION:The relation of a program statement in a loop for control is analyzed in an electronic computer program, and a vector processor instruction is generated for the part of a conditional statement so that a vector CV can be produced based on the conditional evaluation of each element of loop. Further, the control vector CV having each conditional equation controlling the operation part to be controlled is synthesized according to the hierarchy of the control and the vector processor instruction which can operate under the control is generated. Thus, a vector processor objective program can automatically be produced for the loop operation including a conditional statement.