PROCESSOR OF MICROPROGRAM CONTROL SYSTEM

PURPOSE:To have only to provide a self-running function for one set of processor at the master side and to use a register group and a work memory at the inside of the slave side, by leaving the control of an execution clock at the inside of processor for the master side processor. CONSTITUTION:A control order issued from the master side processor is inputted via a bus 15. First, an execution clock is transmitted from a clock control section 14 and the processor starts operation. The transmission of clock is stopped at the next order and the processing of the processor is stopped. One step of processing executed with the next order. A data from a bus 16 is set to a command register 2 with the issue of the next order and set to a command register 8 at the next order. In issuing one step executing order, the one-step command is executed. Further, the internal state of the processor is outputted to the bus 16 from a status register 5.