WAVEFORM CONVERTER
PURPOSE:To miniaturize an integrated circuit, by obtaining a response pulse in synchronizing with the leading or trailing of an input signal with a clocked inverter comprising MOS transistors(TRs). CONSTITUTION:A level in common for the input signal Si and an output Si' of a clock inverter 33 e...
Gespeichert in:
Hauptverfasser: | , |
---|---|
Format: | Patent |
Sprache: | eng |
Schlagworte: | |
Online-Zugang: | Volltext bestellen |
Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
Zusammenfassung: | PURPOSE:To miniaturize an integrated circuit, by obtaining a response pulse in synchronizing with the leading or trailing of an input signal with a clocked inverter comprising MOS transistors(TRs). CONSTITUTION:A level in common for the input signal Si and an output Si' of a clock inverter 33 exists only for a section of a pulse width of a clock pulse CP when the input signal fluctuates, and a negative pulse P2 in response to the leading of the signal Si is obtained from an output of an NAND gate 34. When the input signal Si of the inverter 33 fluctuates from ''1'' to ''0'' in synchronizing with the leading of the clock pulse, a positive pulse P3 in response to the trailing of the signal Si is obtained from an output of an NOR gate 35. Further, an output signal P2 of the NAND gate 34 and an output signal P3 of the NOR gate 35 are inverted respectively with inverters 36 and 37 and pulses P1 and P4 are obtained. |
---|