INTERRUPTION CONTROLLING CIRCUIT

PURPOSE:To improve the processing efficiency of a system as a whole, by setting the priority of interruption from the outside. CONSTITUTION:Internal interruptions CITR are generated asynchronously with each other from devices. An interruption level IT-LV consisting of a prescribed number is set to a register IT-VTR in response to the priority of own device. The output of a CITRF1 is fed to an AND gate A1 together with a transmission request ITAI, i.e., an answer signal of a CPU, and an interruption ITR is delivered via a CITRF2 and an AND gate A2. The interruption ITR is supplied to the CPU via a wired OR line. When the level IT-LV is low although the corresponding device generates the CITR, the count value of a counter CT is set at -1 when the output of an AND gate A3 is set at a high level. The counter CT is preset by the register IT-LVR and then set by the output of the CT before the output of the gate A3 is set at a high level when the contents of the CT are set at the negative value. Thus an interruption factor code can be transmitted with priority.