REARRANGING CIRCUIT FOR DIGITAL DATA
PURPOSE:To perform high-speed transfer, by providing a buffer memory storing optionally data stored in the memory of a processor in the word and the depth directions of respective memories and in the order direction of the processor. CONSTITUTION:Data of 16-bit constitution stored in the 1st storage...
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creator | MORIYA EIJI NISHIHARA EITAROU |
description | PURPOSE:To perform high-speed transfer, by providing a buffer memory storing optionally data stored in the memory of a processor in the word and the depth directions of respective memories and in the order direction of the processor. CONSTITUTION:Data of 16-bit constitution stored in the 1st storage field of a unit processor 1-1 is stored in an address space (Z,Y,X), i.e. (0-15,0,0) of a buffer memory 14-1, bit by bit, from the MSB to the LSB, and data in the 2nd-the 16th fields are stored in address spaces of addresses (0-15,0,0) similarly. Data stored in the 17th-the 32th fields are stored in addresses (0-15,1-63,1-15). While Y is increased successively from 0, the stored data are read to obtain picture data on pixel at positions (0,63)-(0,0). |
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fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_JPS58201165A</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>JPS58201165A</sourcerecordid><originalsourceid>FETCH-epo_espacenet_JPS58201165A3</originalsourceid><addsrcrecordid>eNrjZFAJcnUMCnL0c_f0c1dw9gxyDvUMUXDzD1Jw8XT3DHH0UXBxDHHkYWBNS8wpTuWF0twMim6uIc4euqkF-fGpxQWJyal5qSXxXgHBphZGBoaGZqaOxsSoAQB1uCMd</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>REARRANGING CIRCUIT FOR DIGITAL DATA</title><source>esp@cenet</source><creator>MORIYA EIJI ; NISHIHARA EITAROU</creator><creatorcontrib>MORIYA EIJI ; NISHIHARA EITAROU</creatorcontrib><description>PURPOSE:To perform high-speed transfer, by providing a buffer memory storing optionally data stored in the memory of a processor in the word and the depth directions of respective memories and in the order direction of the processor. CONSTITUTION:Data of 16-bit constitution stored in the 1st storage field of a unit processor 1-1 is stored in an address space (Z,Y,X), i.e. (0-15,0,0) of a buffer memory 14-1, bit by bit, from the MSB to the LSB, and data in the 2nd-the 16th fields are stored in address spaces of addresses (0-15,0,0) similarly. Data stored in the 17th-the 32th fields are stored in addresses (0-15,1-63,1-15). While Y is increased successively from 0, the stored data are read to obtain picture data on pixel at positions (0,63)-(0,0).</description><language>eng</language><subject>CALCULATING ; COMPUTING ; COUNTING ; ELECTRIC DIGITAL DATA PROCESSING ; IMAGE DATA PROCESSING OR GENERATION, IN GENERAL ; PHYSICS</subject><creationdate>1983</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=19831122&DB=EPODOC&CC=JP&NR=S58201165A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76290</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=19831122&DB=EPODOC&CC=JP&NR=S58201165A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>MORIYA EIJI</creatorcontrib><creatorcontrib>NISHIHARA EITAROU</creatorcontrib><title>REARRANGING CIRCUIT FOR DIGITAL DATA</title><description>PURPOSE:To perform high-speed transfer, by providing a buffer memory storing optionally data stored in the memory of a processor in the word and the depth directions of respective memories and in the order direction of the processor. CONSTITUTION:Data of 16-bit constitution stored in the 1st storage field of a unit processor 1-1 is stored in an address space (Z,Y,X), i.e. (0-15,0,0) of a buffer memory 14-1, bit by bit, from the MSB to the LSB, and data in the 2nd-the 16th fields are stored in address spaces of addresses (0-15,0,0) similarly. Data stored in the 17th-the 32th fields are stored in addresses (0-15,1-63,1-15). While Y is increased successively from 0, the stored data are read to obtain picture data on pixel at positions (0,63)-(0,0).</description><subject>CALCULATING</subject><subject>COMPUTING</subject><subject>COUNTING</subject><subject>ELECTRIC DIGITAL DATA PROCESSING</subject><subject>IMAGE DATA PROCESSING OR GENERATION, IN GENERAL</subject><subject>PHYSICS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>1983</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZFAJcnUMCnL0c_f0c1dw9gxyDvUMUXDzD1Jw8XT3DHH0UXBxDHHkYWBNS8wpTuWF0twMim6uIc4euqkF-fGpxQWJyal5qSXxXgHBphZGBoaGZqaOxsSoAQB1uCMd</recordid><startdate>19831122</startdate><enddate>19831122</enddate><creator>MORIYA EIJI</creator><creator>NISHIHARA EITAROU</creator><scope>EVB</scope></search><sort><creationdate>19831122</creationdate><title>REARRANGING CIRCUIT FOR DIGITAL DATA</title><author>MORIYA EIJI ; NISHIHARA EITAROU</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_JPS58201165A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>1983</creationdate><topic>CALCULATING</topic><topic>COMPUTING</topic><topic>COUNTING</topic><topic>ELECTRIC DIGITAL DATA PROCESSING</topic><topic>IMAGE DATA PROCESSING OR GENERATION, IN GENERAL</topic><topic>PHYSICS</topic><toplevel>online_resources</toplevel><creatorcontrib>MORIYA EIJI</creatorcontrib><creatorcontrib>NISHIHARA EITAROU</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>MORIYA EIJI</au><au>NISHIHARA EITAROU</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>REARRANGING CIRCUIT FOR DIGITAL DATA</title><date>1983-11-22</date><risdate>1983</risdate><abstract>PURPOSE:To perform high-speed transfer, by providing a buffer memory storing optionally data stored in the memory of a processor in the word and the depth directions of respective memories and in the order direction of the processor. CONSTITUTION:Data of 16-bit constitution stored in the 1st storage field of a unit processor 1-1 is stored in an address space (Z,Y,X), i.e. (0-15,0,0) of a buffer memory 14-1, bit by bit, from the MSB to the LSB, and data in the 2nd-the 16th fields are stored in address spaces of addresses (0-15,0,0) similarly. Data stored in the 17th-the 32th fields are stored in addresses (0-15,1-63,1-15). While Y is increased successively from 0, the stored data are read to obtain picture data on pixel at positions (0,63)-(0,0).</abstract><oa>free_for_read</oa></addata></record> |
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subjects | CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING IMAGE DATA PROCESSING OR GENERATION, IN GENERAL PHYSICS |
title | REARRANGING CIRCUIT FOR DIGITAL DATA |
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