REARRANGING CIRCUIT FOR DIGITAL DATA

PURPOSE:To perform high-speed transfer, by providing a buffer memory storing optionally data stored in the memory of a processor in the word and the depth directions of respective memories and in the order direction of the processor. CONSTITUTION:Data of 16-bit constitution stored in the 1st storage...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: MORIYA EIJI, NISHIHARA EITAROU
Format: Patent
Sprache:eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
Beschreibung
Zusammenfassung:PURPOSE:To perform high-speed transfer, by providing a buffer memory storing optionally data stored in the memory of a processor in the word and the depth directions of respective memories and in the order direction of the processor. CONSTITUTION:Data of 16-bit constitution stored in the 1st storage field of a unit processor 1-1 is stored in an address space (Z,Y,X), i.e. (0-15,0,0) of a buffer memory 14-1, bit by bit, from the MSB to the LSB, and data in the 2nd-the 16th fields are stored in address spaces of addresses (0-15,0,0) similarly. Data stored in the 17th-the 32th fields are stored in addresses (0-15,1-63,1-15). While Y is increased successively from 0, the stored data are read to obtain picture data on pixel at positions (0,63)-(0,0).