FORWARD GOING SYSTEM FOR INSTRUCTION CONTROL OF COMPUTER
PURPOSE:To improve processing capability, by analyzing the branch result of a branch instruction in a processor itself in respect to time and reflecting this analysis in preceding pickup of instruction control to reduce the disturbance of preceding pickup of instruction control due to the branch ins...
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Format: | Patent |
Sprache: | eng |
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Zusammenfassung: | PURPOSE:To improve processing capability, by analyzing the branch result of a branch instruction in a processor itself in respect to time and reflecting this analysis in preceding pickup of instruction control to reduce the disturbance of preceding pickup of instruction control due to the branch instruction. CONSTITUTION:When a branch instruction which is determined as a control object preliminarily is decoded, the result is held in a flip flop FF20. If the execution of the objective branch instruction results in branching, an AND gate 21 is opened, and a counter 23 is counted up. Otherwise, an AND gate 22 is opened, and a counter 24 is counted up. This operation is repeated hereafter. Contents of counters 23 and 24 are sent to a comparison discriminating circuit 26 through control lines 31 and 32 respectively and are compared and discriminated. The result of the comparsion and discrimination is transmitted to an output line 33 and is held in a flip flop 27. |
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