DIGITAL SIGNAL PROCESSING PROCESSOR

PURPOSE:To decrease the signal transfer time with an external device, by inputting and outputting data while keeping the parallel form, with the external device. CONSTITUTION:An instruction memory circuit 16 of a digital signal processing processor 50 transmits a signal to fetch a signal on a data b...

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1. Verfasser: SUGIYAMA SHIZUO
Format: Patent
Sprache:eng
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Zusammenfassung:PURPOSE:To decrease the signal transfer time with an external device, by inputting and outputting data while keeping the parallel form, with the external device. CONSTITUTION:An instruction memory circuit 16 of a digital signal processing processor 50 transmits a signal to fetch a signal on a data bus line 25 to a bus input register circuit 52, to an instruction line 23. The data fetched in a bus input register circuit 52 is transmitted from external input/output terminals 541- 54n via an external input/output circuit 51. When the signal is supplied to the external input/output terminals 541-54n from an external analog device and the signal is applied to an external input control terminal 57, the input signal is supplied to a bus output register circuit 53 via the external input/output circuit 51 and transmitted on the data bus line 25.