OUTPUT BUFFER CIRCUIT OF INTEGRATED CIRCUIT DEVICE

PURPOSE:To make output amplitude swing to supply voltage, by raise-controlling gate voltage of the other transistor (TR) in accordance with a clock signal, when one of a pair of TRs for constituting an enhancement type output stage is turned off. CONSTITUTION:When a logical signal D is in low potent...

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Bibliographische Detailangaben
1. Verfasser: MURAYAMA KOUJI
Format: Patent
Sprache:eng
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Zusammenfassung:PURPOSE:To make output amplitude swing to supply voltage, by raise-controlling gate voltage of the other transistor (TR) in accordance with a clock signal, when one of a pair of TRs for constituting an enhancement type output stage is turned off. CONSTITUTION:When a logical signal D is in low potential and an output signal V3 of a push-pull circuit P3 becomes high potential, and a clock signal CL becomes high potential, a TRT10 conducts, and potential V6 becomes high potential. A little later, an output signal V4 of a push-pull circuit P4 becomes low potential, TRs T13, T15 become non-conducting, potential V5 rises, and the potential V6 rises higher by a capacitor C. As a result, gate voltage of a TRT14 becomes higher than the sum of supply voltage VDD and threshold voltage VTH, and a high potential level of an output signal VOUT rises up to VDD. When the logical signal D becomes high potential, a low potential level of the output signal VOUT drops to the reference potential.