SEMICONDUCTOR INTEGRATED CIRCUIT

PURPOSE:To reduce the crosstalk noise and parasitic capacity between metallic wirings by a method wherein an insulated film with the specific dielectric power factor lower than that of substrate is provided under the metallic wiring of the first layer and an ion implanted layer is further provided u...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: HAYASHI TAKEHISA, MASAKI AKIRA, TANAKA HIRONORI, INO MASAYUKI, YAGIYUU MASAYOSHI, HIRAYAMA MASAHIRO
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:PURPOSE:To reduce the crosstalk noise and parasitic capacity between metallic wirings by a method wherein an insulated film with the specific dielectric power factor lower than that of substrate is provided under the metallic wiring of the first layer and an ion implanted layer is further provided under the substrate. CONSTITUTION:The Schottky barrier gate type FETs 101-106 are integrated on the GaAs substrate constituting a semiconductor integrated circuit. The orthogonal metallic wirings 107-110 and 112 are provided to connect all the integrated elements with one another. Said metallic wirings 107-110 are arranged on an insulated layer 114 provided on a substrate 100 and a low impedance active layer comprising an ion implanted layer 115 or the ion implanted layer 115 and another ion implanted layer 116 with inverse conductivity are further formed into the substrate 100 under said metallic wirings 107-110. Besides, the specific dielectric power factor of the insulated film 114 is set up lower than that of the substrate 100.