PHASE COMPARISON CIRCUIT

PURPOSE:To return to the synchronizing state, when the period of a comparison pulse F2 is coincident with that of the normal period of the pulse F1 in synchronizing state, even if the phase is not coincident, by changing the period of the pulse F1 when the reference pulse F1 and the pulse F2 are asynchronous. CONSTITUTION:A clock pulse inputted from a CK terminal is counted at a counter 1 for the specified number to generate a reference pulse F1. The pulse F1 and a comparison pulse F2 are compared at a phase comparator 2 consisting of FFs. The comparator 2 generates an output at terminals Qw and QR in asynchronous state. That is, when the F2 is delayed from the F1 by Tw, an output is produced at the terminal Qw, this output is applied to a reset terminal of the counter 1 and gives a delay to the start of count for the Tw. Thus, the period of the reference pulse F1 is T1+Tw. The instant when the period T2 of the pulse F2 is equal to the period T1 of the F1, no, output is produced at the terminal Qw and it is regarded that the pulse F2 is returned to the synchronizing state with a maximum delayed phase to the pulse F1. When the pulse F2 has a lead than the pulse F1, an output is produced at the terminal QR.