OPERAND CONTROL SYSTEM OF DATA FLOW COMPUTER

PURPOSE:To speed an operand control within sufficient memory capacity by directly generating address wherein operands are stored by applying a hash function to a part of information from an arithmetic part, and by securing and releasing their areas dynamically. CONSTITUTION:Parts ACT# and CA of info...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: ITOU NORIYOSHI, KUZUMI SHIYOUSUKE, YASUHARA HIROSHI
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:PURPOSE:To speed an operand control within sufficient memory capacity by directly generating address wherein operands are stored by applying a hash function to a part of information from an arithmetic part, and by securing and releasing their areas dynamically. CONSTITUTION:Parts ACT# and CA of information contained in a token sent from an arithmetic part to an operand storage part 1 are used as a logical address, the low-order digit bits of which are assigned as an in-block address. The storage part 1 is provided with a block conversion part 4 which compresses and converts a logical block into a physical block by using a hash function, an operand memory 6 composed of a set of physical blocks each accessed on the basis of the in-block address, a physical block control part 5 which detects the in-use the state and use completion of each physical block in the memory 6, and a token-number control part 7. Further, chain structure is employed by the memory 6 to secure and release the physical block, and its in-use state is controlled by the control part 7.