JPS5754428

PURPOSE:To make the dielectric strength of titled circuit high, by using MOSFETs of offset construction. CONSTITUTION:A level interface circuit is constituted by using P channel MOSFETs 201, 204 forming the drains with offset construction, and N channel MOSFETs 202, 205 forming the drains with offse...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
1. Verfasser: MISAWA TOSHUKI
Format: Patent
Sprache:eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
Beschreibung
Zusammenfassung:PURPOSE:To make the dielectric strength of titled circuit high, by using MOSFETs of offset construction. CONSTITUTION:A level interface circuit is constituted by using P channel MOSFETs 201, 204 forming the drains with offset construction, and N channel MOSFETs 202, 205 forming the drains with offset construction. The offsets are formed with ion implantation. The avalanche breakdown due to concentrated electric field neat the surface of the drain region in the channel and the destruction of gate oxide film due to the increase in the electric field between the gate electrode and the drain domain can be avoided. Further, the avalanche phenomenon in which the depletion layer of drain is extended to the source region can be prevented, resulting in remarkably increasing the dielectric strength of the level interface circuit.