MANUFACTURE OF SEMICONDUCTOR DEVICE

MANUFACTURE OF SEMICONDUCTOR DEVICE

PURPOSE:To abbreviate the manufacturing process of a semiconductor device and to form a uniform alloy later by a method wherein an alloy foil of Au-Si-Sb is made to come in contact with one main face of a substrate, and a brazed film is provided on the other main face at the temperature higher than...

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Hauptverfasser: FUJIYAMA MASAHIRO, OGATA AKINORI
Format: Patent
Sprache:eng
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BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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creator FUJIYAMA MASAHIRO
OGATA AKINORI
description PURPOSE:To abbreviate the manufacturing process of a semiconductor device and to form a uniform alloy later by a method wherein an alloy foil of Au-Si-Sb is made to come in contact with one main face of a substrate, and a brazed film is provided on the other main face at the temperature higher than the eutectic temperature of the alloy foil. CONSTITUTION:After P type region 2 is provided on the main face of the substrate 1, the alloy foil 10 of Au-Si-Sb is made to come in contact with an electrode setting region of the N type region. The alloy foil contains 11-17% of Si, 1-5% of Sb, and forms an eutectic. Then a buffer plate 6' is brazed to the P type region. Because the brazing temperature is 1,000 deg.C, the alloy foil of Au-Si-Sb being made to come in contact with the N type region can form together an alloy with the surface layer of the N type region. Accordingly the process can be abbreviated, and the uniform alloy layer can be formed.
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fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_JPS5740923A</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>JPS5740923A</sourcerecordid><originalsourceid>FETCH-epo_espacenet_JPS5740923A3</originalsourceid><addsrcrecordid>eNrjZFD2dfQLdXN0DgkNclXwd1MIdvX1dPb3cwl1DvEPUnBxDfN0duVhYE1LzClO5YXS3AwKbq4hzh66qQX58anFBYnJqXmpJfFeAcGm5iYGlkbGjsZEKAEAKmIiuw</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>MANUFACTURE OF SEMICONDUCTOR DEVICE</title><source>esp@cenet</source><creator>FUJIYAMA MASAHIRO ; OGATA AKINORI</creator><creatorcontrib>FUJIYAMA MASAHIRO ; OGATA AKINORI</creatorcontrib><description>PURPOSE:To abbreviate the manufacturing process of a semiconductor device and to form a uniform alloy later by a method wherein an alloy foil of Au-Si-Sb is made to come in contact with one main face of a substrate, and a brazed film is provided on the other main face at the temperature higher than the eutectic temperature of the alloy foil. CONSTITUTION:After P type region 2 is provided on the main face of the substrate 1, the alloy foil 10 of Au-Si-Sb is made to come in contact with an electrode setting region of the N type region. The alloy foil contains 11-17% of Si, 1-5% of Sb, and forms an eutectic. Then a buffer plate 6' is brazed to the P type region. Because the brazing temperature is 1,000 deg.C, the alloy foil of Au-Si-Sb being made to come in contact with the N type region can form together an alloy with the surface layer of the N type region. Accordingly the process can be abbreviated, and the uniform alloy layer can be formed.</description><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>1982</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=19820306&amp;DB=EPODOC&amp;CC=JP&amp;NR=S5740923A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25562,76317</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=19820306&amp;DB=EPODOC&amp;CC=JP&amp;NR=S5740923A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>FUJIYAMA MASAHIRO</creatorcontrib><creatorcontrib>OGATA AKINORI</creatorcontrib><title>MANUFACTURE OF SEMICONDUCTOR DEVICE</title><description>PURPOSE:To abbreviate the manufacturing process of a semiconductor device and to form a uniform alloy later by a method wherein an alloy foil of Au-Si-Sb is made to come in contact with one main face of a substrate, and a brazed film is provided on the other main face at the temperature higher than the eutectic temperature of the alloy foil. CONSTITUTION:After P type region 2 is provided on the main face of the substrate 1, the alloy foil 10 of Au-Si-Sb is made to come in contact with an electrode setting region of the N type region. The alloy foil contains 11-17% of Si, 1-5% of Sb, and forms an eutectic. Then a buffer plate 6' is brazed to the P type region. Because the brazing temperature is 1,000 deg.C, the alloy foil of Au-Si-Sb being made to come in contact with the N type region can form together an alloy with the surface layer of the N type region. Accordingly the process can be abbreviated, and the uniform alloy layer can be formed.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>1982</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZFD2dfQLdXN0DgkNclXwd1MIdvX1dPb3cwl1DvEPUnBxDfN0duVhYE1LzClO5YXS3AwKbq4hzh66qQX58anFBYnJqXmpJfFeAcGm5iYGlkbGjsZEKAEAKmIiuw</recordid><startdate>19820306</startdate><enddate>19820306</enddate><creator>FUJIYAMA MASAHIRO</creator><creator>OGATA AKINORI</creator><scope>EVB</scope></search><sort><creationdate>19820306</creationdate><title>MANUFACTURE OF SEMICONDUCTOR DEVICE</title><author>FUJIYAMA MASAHIRO ; OGATA AKINORI</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_JPS5740923A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>1982</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>FUJIYAMA MASAHIRO</creatorcontrib><creatorcontrib>OGATA AKINORI</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>FUJIYAMA MASAHIRO</au><au>OGATA AKINORI</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>MANUFACTURE OF SEMICONDUCTOR DEVICE</title><date>1982-03-06</date><risdate>1982</risdate><abstract>PURPOSE:To abbreviate the manufacturing process of a semiconductor device and to form a uniform alloy later by a method wherein an alloy foil of Au-Si-Sb is made to come in contact with one main face of a substrate, and a brazed film is provided on the other main face at the temperature higher than the eutectic temperature of the alloy foil. CONSTITUTION:After P type region 2 is provided on the main face of the substrate 1, the alloy foil 10 of Au-Si-Sb is made to come in contact with an electrode setting region of the N type region. The alloy foil contains 11-17% of Si, 1-5% of Sb, and forms an eutectic. Then a buffer plate 6' is brazed to the P type region. Because the brazing temperature is 1,000 deg.C, the alloy foil of Au-Si-Sb being made to come in contact with the N type region can form together an alloy with the surface layer of the N type region. Accordingly the process can be abbreviated, and the uniform alloy layer can be formed.</abstract><oa>free_for_read</oa></addata></record>
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subjects BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
title MANUFACTURE OF SEMICONDUCTOR DEVICE
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-10T00%3A33%3A17IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=FUJIYAMA%20MASAHIRO&rft.date=1982-03-06&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EJPS5740923A%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true