SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE

PURPOSE:To obtain C-MOSIC having high integration and no bi-polar effect by preparing N-channel and P-channel transistors in such a manner that they are overlaped each other vertically. CONSTITUTION:A thick field oxide film 102 is formed at the peripheral part of an N type Si substrate 101, a thin g...

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Bibliographische Detailangaben
1. Verfasser: SAKAI SHIGEMI
Format: Patent
Sprache:eng
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Zusammenfassung:PURPOSE:To obtain C-MOSIC having high integration and no bi-polar effect by preparing N-channel and P-channel transistors in such a manner that they are overlaped each other vertically. CONSTITUTION:A thick field oxide film 102 is formed at the peripheral part of an N type Si substrate 101, a thin gate oxide film 103 is connected to an active region surrounded by the film 102, and a gate electrode 104 of polycrystalline Si containing N type impurities is provided in the central part of the film 103 so as to surround an oxide film 105. Next, by using this film as a mask, a P type region 106 is formed diffusely in active regions on both sides of the film 105, a polycrystalline Si layer containing P type impurities is grown on the whole surface and subjected to laser annealing and thereby a P type single crystal layer 107 is formed. Afterward, an N type region 108 is formed diffusely in the layer 107 located on both sides of the gate electrode 104, the layer 107 in an inactive region which is an unnecessary part is removed by the photoetching method, an inter-layer insulator film 109 is grown on the whole surface by the CVD method, an opening 110 is provided, Al wiring electrodes 111 are connected to the P type region 106 and N type region 108 respectively, and thus a device having a three- dimensional structure is prepared.