LEVEL SHIFT CIRCUIT

PROBLEM TO BE SOLVED: To control the level-shifted output signal within a desired output range by feeding back the output signal which is level-shifted and changing drain current flowing in a transistor executing the operation of level shift. SOLUTION: The node n2 of the transistor PMOS1 is branched...

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Bibliographische Detailangaben
1. Verfasser: MORIYA TOMONORI
Format: Patent
Sprache:eng
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Zusammenfassung:PROBLEM TO BE SOLVED: To control the level-shifted output signal within a desired output range by feeding back the output signal which is level-shifted and changing drain current flowing in a transistor executing the operation of level shift. SOLUTION: The node n2 of the transistor PMOS1 is branched into a node n3 being the output system of the signal which is level-shifted and the node n4 of the transistors PMOS3 and PMOS4 supplying bias current for level shift to the transistor PMOS1. The node n3 is branched into the node of the transistor PMOS2 which feeds back the signal to the transistor PMOS1 for level shift through a comparison circuit CMP and a node being the output system of the level shift signal. The output signal is fed back to the transistor PMOS1 executing the operation of level shift and drain current is changed.