SLEW RATE OUTPUT BUFFER

PROBLEM TO BE SOLVED: To reduce the fluctuation of output delay time due to the load capacitance without increasing the circuit scale. SOLUTION: A delay drive control means 2 has a delay circuit DL1 which changes the level of a node a3 after a fixed time T1 is elapsed from the level change of input voltage Vin, and the MOS transistors TR P1, P2, N1 and N2 which delay the operation of a delay drive output circuit 4 against the level change of the Vin. When the Vin level changes, a non-delay drive output circuit 3 is actuated by an inverter I1 and at the same time the operation of the circuit 4 is stopped by the TR P1 and N2. When the level of the node a3 changes, a transmission gate is opened by the TR P2 and N2 and a delayed operation of the circuit 4 is started. The operation timing error that is caused between both circuits 3 and 4 is always kept at a fixed time T1 and never varied by the value of load capacitance Cout. Thus, the fluctuation is reduced for the delay time of the output voltage.