METHOD OF DESIGNING SEMICONDUCTOR INTEGRATED CIRCUIT

PROBLEM TO BE SOLVED: To design a semiconductor integrated circuit, using an I/O cell pattern, irrespective of the number of different voltage sources by designing, using an I/O pattern having a pattern of nodes connectable to patterns of outer and inner power lines. SOLUTION: A first node pattern N...

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1. Verfasser: KONDOU KAZUHIRO
Format: Patent
Sprache:eng
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Zusammenfassung:PROBLEM TO BE SOLVED: To design a semiconductor integrated circuit, using an I/O cell pattern, irrespective of the number of different voltage sources by designing, using an I/O pattern having a pattern of nodes connectable to patterns of outer and inner power lines. SOLUTION: A first node pattern N1 has a terminal A1 connectable to an outer power line pattern at a first area at the top end shown by a triangle and terminal A2 connectable to an inner power line pattern L1 at a second area below it shown by a triangle. A second node pattern N2 has a terminal B1 connectable to an outer ground line pattern at a first area at the top end shown by a triangle and terminal B2 connectable to an inner ground line pattern L2 at a second area below it shown by a triangle. This allows an semiconductor integrated circuit to be designed, using one kind of I/O cell pattern, irrespective of the number of different voltage sources.