SEMICONDUCTOR MEMORY

PROBLEM TO BE SOLVED: To obtain a semiconductor memory in which the speed of a readout operation is made high and whose power consumption is reduced. SOLUTION: A selective-bit-line-pair potential-difference detection circuit 14 which detects a very small potential difference between selective bit line pairs SBL1, SBL2 in a readout operation and which generates selective-bit- line-pair potential-difference detection signals BVD, BVD* at an activation level is installed. A sense amplifier 13 is formed to be of a flip-flop circuit type which is controlled directly by the signal BVD. A selective column- connection control circuit 11 which separates the sense amplifier 13 from the selective bit line pairs SBL1, SBL2 in a sense amplification operation is installed. A word-line drive circuit 7 is controlled directly by the signal BVD*, and it speeds up the change timing at the nonselective level of a word line WL.