CLOCK SKEW CONTROL CIRCUIT

PROBLEM TO BE SOLVED: To provide a clock skew control circuit capable of automatically controlling the timing of access to a memory even after packaging of a device and controlling the dispersion in products, the dispersion in the wiring length of the device and further the dispersion of timing caused by the external factor of the memory or the like. SOLUTION: When the power source of a device 11 is turned on, the write/ read of data to a memory 13 is performed by a semiconductor integrated circuit 12, a control circuit 14 judges whether the data can be normally written/read or not and when the data can not be normally written/read, skew is controlled by delay circuits 15a and 15b. Then, the write/read of data to the memory 13 is performed again. This sequence is repeated until the write/read of the memory 13 can be normally performed, and a skew value is controlled within the range controllable for the control circuit 14.