WAFER AND WAFER BURN-IN METHOD

PROBLEM TO BE SOLVED: To provide a wafer suitable for a burn-in device which enables a burn-in structure and a burn-in method. SOLUTION: At least one of plural chip areas is replaced with a signal generating circuit. When supplied with power from outside, a signal generating circuit generates a burn...

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1. Verfasser: KUMAMARU TOMOYUKI
Format: Patent
Sprache:eng
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Zusammenfassung:PROBLEM TO BE SOLVED: To provide a wafer suitable for a burn-in device which enables a burn-in structure and a burn-in method. SOLUTION: At least one of plural chip areas is replaced with a signal generating circuit. When supplied with power from outside, a signal generating circuit generates a burn-in signal. A stack of a wafer 1, a film 15 and a probe card 6 results in electrical connection between a power supply bump 10 of the probe card 6 and a power receiving pad 7, and between grounding supply bump 12 of the probe card 6 and a ground receiving pad 9. A burn-in signal is supplied to each ship area on the wafer 1 from the signal generating circuit 1 via a burn-in signal feed wiring 17 and a bump 16. This obviates the need for generation and supply of a burn-in device outside. The structure of the probe card is simplified.