LINEAR ARRANGEMENT OF WAFER IN SECTIONS BETWEEN METALLIC FUSES

PROBLEM TO BE SOLVED: To minimize relative errors in circuit characteristics produced by the insufficient observance of process parameters and resultant insufficient removal of polyimide on the sections between metallic fuses in the linear arrangement in the sections between metallic fuses of the circuit characteristics on wafers in a bit assembly. SOLUTION: In a linear arrangement in the sections between metallic fuses representing the characteristics of the circuit on wafers in a bit assembly, a passivation film covering the linear arrangement must be removed for enabling baking the sections 1-5 between fuses. With such a constitution, when the observance of process parameter is insufficient and the removal of polyimide in the sections between metallic fuses is insufficient, the resultant relative errors in the circuit characteristics can be minimized by adjacently arranging the other fuse sections on both sides of the fuse sections corresponding to the most significant bit.