SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE

PROBLEM TO BE SOLVED: To enable a burn-in test with a small number of external terminals, wiring and I/O buffers in the configuration where a CPU or LOGIC and RAM are mounted on the same chip. SOLUTION: A pattern generator 12 can generate a burn-in test pattern at an input terminal 5 required as the burn-in test of a lot of DRAM 2 corresponding to a small number of control signals, this can be completed with a small number of external terminals 11 and I/O buffers and by reducing the operation of the I/O buffer at the time of the burn-in test, accuracy can be improved for the reliability test of the DRAM 2.