MANUFACTURE OF CHIP SCALE PACKAGE USING LAMINATED LEAD FRAME

PROBLEM TO BE SOLVED: To simplify a manufacturing process by manufacturing lead frames by the stamping method. SOLUTION: A first lead frame 20 includes terminals 24 formed integrally with a plurality of leads 22 arranged in a plurality of arrays and side rails 26 formed on two edges opposing longitu...

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Hauptverfasser: SAI KANKIN, RI KICHIN, TEI TAIKEI, TEI DOSHU
Format: Patent
Sprache:eng
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Zusammenfassung:PROBLEM TO BE SOLVED: To simplify a manufacturing process by manufacturing lead frames by the stamping method. SOLUTION: A first lead frame 20 includes terminals 24 formed integrally with a plurality of leads 22 arranged in a plurality of arrays and side rails 26 formed on two edges opposing longitudinally, and a second lead frame 30 includes a plurality of external connection means arranged in a plurality of arrays, tie-bars 38 formed integrally with each of the external connection means and side rails 36 formed on two edges opposing longitudinally. The external connection means of the second lead frame 30 are oriented to line up on the corresponding terminals 24, and the tie-bars 38 of the second lead frame 30 are cut, and a semiconductor chip with a plurality of bonding pads formed thereon is mounted on the leads 22 of the first lead frame 20 by a bonding means, and the ends of the leads 22 are connected electrically, and the flames are sealed by sealing means, then unwanted portions of the first lead frame 20 and the second lead frame 30 are cut.