SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE

PROBLEM TO BE SOLVED: To improve wiring efficiency, by wiring the clock main line in the wiring layer, which is electrically insulated from a signal wiring layer, on a clock pin for applying a clock signal, and electrically connecting the clock pin and the clock main line. SOLUTION: In a semiconductor integrated circuit device 1, the clock signal from the outside is applied on a clock input pin 3 of the semiconductor integrated circuit device 1, amplified in a clock driver 4, applied on a clock pin 6 arranged on a signal wiring layer through a through hole, which is provided on each cell 2 on a clock main line 5 arranged on a special clock wiring layer, and inputted into the gate electrode of the cell 2 requiring the distribution of the clock from the gate connecting through hole. Since the clock main line 5 is wired on the special clock wiring layer, the wiring efficiency does not become worse by the obstruction of the clock main line 5 on the other wiring, and the wiring to a spot directly above each cell 2 becomes possible.