METHOD AND DEVICE FOR CONTROLLING TIMING AND INFORMATION PROCESSOR

PROBLEM TO BE SOLVED: To evade a data collision in a data bus without giving effect on original access time by previously changing the timing of a control signal. SOLUTION: A control part 4 is connected to accessed parts (ROM2, RAM3 and a peripheral IO part 8) via a bus line 17. A timing control par...

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1. Verfasser: KADOKURA YUSUKE
Format: Patent
Sprache:eng
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Zusammenfassung:PROBLEM TO BE SOLVED: To evade a data collision in a data bus without giving effect on original access time by previously changing the timing of a control signal. SOLUTION: A control part 4 is connected to accessed parts (ROM2, RAM3 and a peripheral IO part 8) via a bus line 17. A timing control part 5 controls an access timing to the accessed parts by the control part 4 which is connected by the bus line. The timing control part 5 inputs the control signal (XIORD0 and XMRD0) for performing access to the peripheral device and generates the new control signals (XIORD1 and XMRD1) for completing the access to the accessed parts at the timing being earlier than the read access which is executed by the control signals based on the signals. Then, the new control signals are supplied to the accessed parts to substitute for read access.