SEMICONDUCTOR DEVICE AND ITS MANUFACTURING METHOD

PROBLEM TO BE SOLVED: To try to decrease parasitic capacitance of gate electrodes and wirings. SOLUTION: A gate electrode 5 is formed, through a gate insulation film 4, on a device separation film oxide 2 formed on a silicon substrate 1. A lightly doped source-drain area 3a is formed by impurity dop...

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1. Verfasser: MOGAMI TORU
Format: Patent
Sprache:eng
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Zusammenfassung:PROBLEM TO BE SOLVED: To try to decrease parasitic capacitance of gate electrodes and wirings. SOLUTION: A gate electrode 5 is formed, through a gate insulation film 4, on a device separation film oxide 2 formed on a silicon substrate 1. A lightly doped source-drain area 3a is formed by impurity doping (a). A silicon oxide film is frown by RF sputtering method with its wafer substrate biased low voltage (i.e., -10V). With this process, a considerably close film can be formed on the flat area, however on the rough area, a film with slit cavity is formed close to the side of the gate electrode because of poor step coverage. A heavily doped source-drain area 3b is formed by impurity doping (b). After an inlet layer insulation film 7 is formed (c) and a contact hole is opened (d), the Al wiring 8 is firmed (d).