PLL CIRCUIT

PROBLEM TO BE SOLVED: To prevent a signal fed back to the PLL circuit from being affected by variation of a load and to maintain a stable phase-locked state by outputting the oscillation signal of the oscillation stage of a voltage-controlled oscillator to a PLL control circuit and outputting the output signal of a buffer stage which buffers and amplifies the sent signal to the outside. SOLUTION: The reference frequency signal generated by a reference frequency signal oscillator TCXO 1 is inputted to the oscillation stage of the voltage-controlled oscillator VCO 2 and a signal which is oscillated according to a control voltage is supplied as a feedback signal to a PLL-IC 3, and buffered and amplified by the buffer stage of the VCO 2 and then outputted to the outside. The PLL-IC 3 generates a control signal according to the phase difference between the reference frequency signal and feedback signal and supplies it to the VCO 2. Thus, the VCO 2 is provided with the oscillation stage and buffer stage, the feedback signal to the PLL circuit is supplied from the oscillation stage, and that to the load is outputted from the buffer stage to make the feedback signal irrelevant to variation of the load, thereby stabilizing the operation.