SEMICONDUCTOR MEMORY

PROBLEM TO BE SOLVED: To provide a semiconductor memory which can perform reading/ writing of data of an arbitrary memory cell from one data input/output terminal at the time of an I/O degradation mode. SOLUTION: A degradation read-out switching circuit 1 is provided between a data coincidence/uncoi...

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Bibliographische Detailangaben
Hauptverfasser: AKAMATSU HIROSHI, HORIBATAKE SHUICHI
Format: Patent
Sprache:eng
Schlagworte:
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Zusammenfassung:PROBLEM TO BE SOLVED: To provide a semiconductor memory which can perform reading/ writing of data of an arbitrary memory cell from one data input/output terminal at the time of an I/O degradation mode. SOLUTION: A degradation read-out switching circuit 1 is provided between a data coincidence/uncoincidence discrimination circuit 120 and degraded one data input/output terminal. Desired data out of output data DOT of the discrimination circuit 120 and read-out data DO1-DO4 can be read out, a defective memory cell out of four memory cells can be specified.