METHOD AND DEVICE FOR CIRCUIT DESIGN

PROBLEM TO BE SOLVED: To realize efficient arrangement and wiring without the occurrence of erroneous paths by counting the frequency with which a path passes each pin of an arrangement object cell at the time of tracing the path. SOLUTION: An arrangement part 2 arranges cells based on the logical d...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: SUGIYAMA HIROYUKI, BIZEN NAOMI, ABE TAISUKE
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:PROBLEM TO BE SOLVED: To realize efficient arrangement and wiring without the occurrence of erroneous paths by counting the frequency with which a path passes each pin of an arrangement object cell at the time of tracing the path. SOLUTION: An arrangement part 2 arranges cells based on the logical design result of a logical design part 1, and arranged cells are mutually wired by a wiring part 3. A path trace part 4 traces a path from one ore more trace start pins with respect to the logical design result. At this time of tracing the path, a passage frequency counting part 5 counts the frequency with which the path passes each pin of the arrangement object cell. The arrangement part 2 arranges cells in accordance with a precedence based on the counted result of the passage frequency counting part 5, and the wiring part 3 mutually wires cells. Consequently, the frequency with which the path passes each pin (a static signal propagation density) is obtained by tracing the path after logical design and can be used as an index of arrangement and wiring.