PEAK HOLDING CIRCUIT

PROBLEM TO BE SOLVED: To ensure sufficiently the linearity of input/output responses even with small amplitude input signal by holding the peak value of a signal added to the output pulse exceeding a fixed threshold value. SOLUTION: A comparator 16 compares negative polar measured pulse inputted thr...

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1. Verfasser: MATSUZAKI MASAAKI
Format: Patent
Sprache:eng
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Zusammenfassung:PROBLEM TO BE SOLVED: To ensure sufficiently the linearity of input/output responses even with small amplitude input signal by holding the peak value of a signal added to the output pulse exceeding a fixed threshold value. SOLUTION: A comparator 16 compares negative polar measured pulse inputted through an emitter follower circuit 20 with relative voltage (value responsive to the smallest amplitude) to generate specified pulses when the measured pulse exceeds the relative voltage. This output pulse is amplified by an amplifier circuit 22 to determine the gain by a ratio of load resistance to feed-back resistance 17 and reversed in respect of the phase to output a positive polar pulse. On the other hand, the input pulse delayed by a delay line 4 is amplified by an amplifier circuit 21 to output the positive polar pulse, and an adding circuit constituted from the amplifier circuits 21, 22 having in common the load resistance adds the output pulse of a comparator 16 to the initial input pulse so that a hold condenser 10 holds through a diode 9 input peak voltage. Namely, the input pulse is graded up by a fixed value with the addition of the output pulse and the input signal with a small amplitude can be also ensured in respect of the linearity of the diode property.